Signal And Power Integrity Engineer

Intel Corporation

Santa Clara, California, United States
Base: $141,910.00-269,100.00 usd; bonus/equity: st...
Hybrid
High-speed signal integrity simulation
Power delivery network design
Pcb layout execution leadership
Intel Corporation is seeking a Signal and Power Integrity Engineer to join their Integrated Photonics Solutions team in Santa Clara, California. The role requires extensive experience in high-speed signal integrity and power integrity, focusing on the design and testing of optical transceivers and related hardware

Job Summary

  • The role involves leading the hardware design of optical transceivers and evaluation boards from concept through EVT/DVT phases for next-generation data center solutions.
  • Candidates must possess extensive experience in designing PDNs for high-speed DSPs and RFICs while managing tradeoffs between SI and PI requirements.
  • Intel offers a competitive total compensation package including stock bonuses, health benefits, and retirement programs for this on-site position in Santa Clara.

Matching Summary

Match Score: 85

Intel Corporation is seeking a Signal and Power Integrity Engineer to join their Integrated Photonics Solutions team in Santa Clara, California. The role requires extensive experience in high-speed signal integrity and power integrity, focusing on the design and testing of optical transceivers and related hardware.

Salary

Base: $141,910.00-269,100.00 USD; Bonus/Equity: Stock bonuses included; Benefits: Health, retirement, vacation

Skills & Requirements

Must-have

  • High-speed signal integrity simulation
  • Power delivery network design
  • PCB layout execution leadership
  • HFSS and Sigrity tool expertise
  • Optical transceiver electrical design

Nice-to-have

  • Strong analog and digital circuit skills
  • Experience with Marvell or Broadcom DSPs
  • Laboratory optical measurement proficiency
  • Cross-functional team collaboration
  • Knowledge of IEEE Ethernet standards

Key Requirements

  • M.S. in Electrical Engineering
  • 3+ years high-speed SI/PI experience
  • 3+ years experience with HFSS/Sigrity/Cadence
  • Transceiver electrical design principles
  • High-density multi-layer board design

Work Rights

Not specified

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