This role involves leading the pre-silicon functional verification of complex CPU microarchitecture blocks to ensure correctness against architectural specifications
Job Summary
This role involves leading the pre-silicon functional verification of complex CPU microarchitecture blocks to ensure correctness against architectural specifications.
Candidates will architect scalable UVM-based verification environments and implement advanced assertion-based verification strategies to validate intricate logic behaviors.
The position requires close collaboration with microarchitecture and design teams to debug complex RTL failures and drive systematic coverage closure.
Matching Summary
Match Score: 85
This role involves leading the pre-silicon functional verification of complex CPU microarchitecture blocks to ensure correctness against architectural specifications.
Skills & Requirements
Must-have
5+ years digital logic design experience
SystemVerilog and C++ scripting skills
UVM-based testbench architecture
Advanced English proficiency required
Unrestricted permanent work rights in Mexico
Nice-to-have
Experience with Synopsys simulators
Formal verification methodology knowledge
Mentoring junior engineers capability
Performance modeling experience
Emulation and prototyping support
Key Requirements
Bachelor's degree in Electrical/Electronic or Computer Engineering
Minimum 5 years experience (or Master's with 3 years)
Must have unrestricted permanent right to work in Mexico
Work Rights
Must have unrestricted permanent right to work in Mexico